The details of the requirements for the Receiver are defined in the MOPS and the software incorporated in the Receiver was designed based on its information only. It is thought that there are variations in the software to satisfy the MOPS and we herein present a concrete example for your reference, on which we like to have your comments.

　

2.　SPECIFICATIONS OF RECEIVER

　

Our prototype Receiver has been developed so that it meets the requirements for Class Beta-3 Equipment in the MOPS.

Table 1 shows representative specifications of our Receiver.

　

Table 1.　Specifications of our Receiver

　

3.　HARDWARE STRUCTURE

　

This Receiver is produced by way of trial and not intended to be for sale. Its hardware is therefore, constructed using components which can be procured in the market as far as possible. The digital part is configured by Field Programmable Gate Array (FPGA).

Figure 1 shows hardware block diagram of our Receiver. It has four Print Circuit Boards (PCBs) : 1) Signal Processing Board, 2) Signal Processing CPU Board, 3) Position Calculation CPU Board, 4) Interface Board. We developed software for both CPU boards.

　

Figure 1.　Hardware Block Diagram

　

4.　SOFTWARE STRUCTURE

　

We divided our software into two major blocks and each block has one CPU on the board in order to reduce a calculation load. In our program, all of the code have been written in C/C++ language for the future portability. The functional block of software of our Receiver consists of the following twelve modules:

　

1.　Signal-tracking processing

2.　Extracting WAAS Message

3.　Time Management

4.　Position Fix Calculation

5.　Data Input/Output

6.　WAAS Message Compiler

7.　WAAS Ionospheric Calculation and Determination of δUDREI

8.　FD/FDE Processing

9.　Satellite Capturing/Tracking Manager

10.　Calculation of Position Fix Parameters

11.　GPS Message Compiler

12.　Coarse Calculation of Satellite Position

　

Typical data flow among modules is shown in Figure 2.

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